This disclosure is generally directed to integrated circuits and more specifically to a system and method for providing capacitive spare fill cells in an integrated circuit.
Conventional microprocessor chips and other integrated circuits typically use voltage and ground rails to provide operating power to various components in the circuits. These circuits routinely suffer from xe2x80x9cvoltage droopsxe2x80x9d and xe2x80x9cground bounces.xe2x80x9d In a voltage droop, the voltage supplied by a voltage is rail falls below a threshold required for proper operation of a circuit. In a ground bounce, a ground rail acquires a voltage greater than zero, which may also interfere with the proper operation of the circuit. In conventional integrated circuits, large capacitors are often used to stabilize the voltages of the voltage and ground rails.
This disclosure provides a system and method for providing capacitive spare fill cells in an integrated circuit.
In one embodiment, an integrated circuit includes logic operable to perform at least one function. The integrated circuit also includes at least one spare fill cell disposed in at least one portion of the integrated circuit that is not occupied by the logic. The at least one spare fill cell includes at least one spare transistor configured as a capacitor and coupled to a voltage rail and a ground rail.
In another embodiment, a processor includes an integer unit operable to execute integer instructions and a floating point unit operable to execute floating point instructions. The processor also includes at least one spare fill cell disposed in at least one portion of the processor that is not occupied by the integer unit and the floating point unit. The at least one spare fill cell includes at least one spare transistor configured as a capacitor and coupled to a voltage rail and a ground rail.
In yet another embodiment, a method includes fabricating logic operable to perform at least one function in an integrated circuit. The method also includes fabricating at least one spare fill cell disposed in at least one portion of the integrated circuit that is not occupied by the logic. The at least one spare fill cell includes at least one spare transistor. The method further includes configuring the at least one spare transistor as a capacitor coupled to a voltage rail and a ground rail.
One or more technical features may be present according to various embodiments of this disclosure. Particular embodiments of this disclosure may exhibit none, some, or all of the following features depending on the implementation. For example, in one embodiment, a system for providing capacitive spare fill cells is provided. In particular, an integrated circuit includes one or more spare fill cells, which contain at least one unused or xe2x80x9csparexe2x80x9d transistor. These transistors may be used to implement future modifications to the integrated circuit. For example, a modification to the design of the integrated circuit may be needed in the future, and the modification may require the use of additional transistors. The spare transistors in the spare fill cells can be used to implement the modification to the integrated circuit. In this way, the modification may not require extensive rearrangement and remapping of the components of the integrated circuit.
Moreover, while the spare fill cells are not being used to implement functions performed by the integrated circuit, the spare transistors can be configured to act as capacitors in the integrated circuit. The capacitive transistors may then be used to help stabilize voltage and ground rails in the integrated circuit. This may help to reduce or eliminate the need to use other capacitors to stabilize the voltage and ground rails. This may also help to reduce the size of the integrated circuit.
This has outlined rather broadly several features of this disclosure so that those skilled in the art may better understand the DETAILED DESCRIPTION that follows. Additional features may be described later in this document. Those skilled in the art should appreciate that they may readily use the concepts and the specific embodiments disclosed as a basis for modifying or designing other structures for carrying out the same purposes of this disclosure. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the invention in its broadest form.
Before undertaking the DETAILED DESCRIPTION below, it may be advantageous to set forth definitions of certain words and phrases Used throughout this patent document. The terms xe2x80x9cincludexe2x80x9d and xe2x80x9ccomprise,xe2x80x9d as well as derivatives thereof, mean inclusion without limitation. The term xe2x80x9corxe2x80x9d is inclusive, meaning and/or. The phrases xe2x80x9cassociated withxe2x80x9d and xe2x80x9cassociated therewith,xe2x80x9d as well as derivatives thereof, may mean to include, be included within, interconnect with, contain, be contained within, connect to or with, couple to or with, be communicable with, cooperate with, interleave, juxtapose, be proximate to, be bound to or with, have, have a property of, or the like. The term xe2x80x9ccontrollerxe2x80x9d means any device, system, or part thereof that controls at least one operation. A controller may be implemented in hardware, firmware, or software, or a combination of at least two of the same. It should be noted that the functionality associated with any particular controller may be centralized or distributed, whether locally or remotely. Definitions for certain words and phrases are provided throughout this patent document, and those of ordinary skill in the art should understand that in many, if not most instances, such definitions apply to prior as well as future uses of such defined words and phrases.